Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD

Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD free pdf ebook was written by Ken Chapman on February 20, 2006 consist of 13 page(s). The pdf file is provided by japan.xilinx.com and available on pdfpedia since May 08, 2012.

initial design for spartan-3e starter kit (lcd display control) ken chapman xilinx ltd 16th february 2006 rev.2 limitations limited..data, lost profits, cost or procurement of substitute goods or services,..applications specialist email: chapman@xilinx.com the author would also be pleased to hear...

send send what is readshare?

Thank you for helping us grow by simply clicking on facebook like and google +1 button below ^^

Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD pdf

: 790
: 0
: May 08, 2012
: Ken Chapman
Total Page(s)
: 13
Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD  - page 1
Initial Design Spartan-3E Starter Kit (LCD Display Control) Ken Chapman Xilinx Ltd 16 th February 2006 Rev.2 for
You're reading the first 10 out of 13 pages of this docs, please download or login to readmore.
Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD  - page 2
Limitations Limited Warranty and Disclaimer. These designs are provided to you “as is”. Xilinx and its licensors make and you receive no warranties or conditions, express, implied, statutory or otherwise, and Xilinx specifically disclaims any implied warranties of merchantability, non-infringement, or fitness for a particular purpose. Xilinx does not warrant that the functions contained in these designs will meet your requirements, or that the operation of these designs will be uninterrupted or error free, or that defects in the Designs will be corrected. Furthermore, Xilinx does not warrant or make any representations regarding use or the results of the use of the designs in terms of correctness, accuracy, reliability, or otherwise. Limitation of Liability. In no event will Xilinx or its licensors be liable for any loss of data, lost profits, cost or procurement of substitute goods or services, or for any special, incidental, consequential, or indirect damages arising from the use or operation of the designs or accompanying documentation, however caused and on any theory of liability. This limitation will apply even if Xilinx has been advised of the possibility of such damage. This limitation shall apply not-withstanding the failure of the essential purpose of any limited remedies herein. This design module is not supported by general Xilinx Technical support as an official Xilinx Product. Please refer any issues initially to the provider of the module. Any problems or items felt of value in the continued improvement of KCPSM3 or this reference design would be gratefully received by the author. Ken Chapman Senior Staff Engineer – Spartan Applications Specialist email: chapman@xilinx.com The author would also be pleased to hear from anyone using KCPSM3 or the UART macros with information about your application and how these macros have been useful. PicoBlaze Spartan-3E Starter Kit Initial Design 2
Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD  - page 3
Design Overview This design is provided on the Spartan-3E Starter Kit when it is dispatched from the factory. It confirms that the board is operational by scrolling a simple message across the LCD display and allowing the LED’s to be controlled by the rotary knob, press buttons and slide switches. The principle purpose of this document is to illustrate how PicoBlaze can be used to control the LCD display. It is hoped that the design may form the basis for future PicoBlaze designs as well as provide a general introduction to the board. Some exercises are suggested to encourage further self study. Try it now – it only takes 30 seconds! It is recommended that you try this to become familiar with what the design does before continuing to read. If your board is ‘fresh out of the box’, then simply connect the power supply, switch on and see the design come to life. If it doesn’t work (XC- DONE LED remains unlit), check that all 3 jumpers are installed in J30 and press the PROG button again. If your board has be reprogrammed since it arrived, you can still try the design quickly. As well as the source design files, a compiled configuration bit file is provided which you can immediately download into the Spartan XC3S500E device on your board. To make this task really easy the first time, unzip all the files provided into a directory and then…. double click on ‘install_s3esk_startup.bat’. Assuming you have the Xilinx software installed, your board connected with the USB cable and the board powered (don’t forget the switch), then this should open a DOS window and run iMPACT in batch mode to configure the Spartan-3E with the design. Rotate knob to control position of the illuminated LED Press and release knob to toggle between control modes West North South East SW3 SW2 SW1 SW0 Operate buttons and switches to illuminated each LED 4 press buttons Scrolling message 8 LEDs 4 slide switches PicoBlaze Spartan-3E Starter Kit Initial Design 3
Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD  - page 4
PicoBlaze Design Size The images and statistics on this page show that the design occupies just 113 slices and 1 BRAM. This is only 2.5% of the slices and 5% of the BRAMs available in an XC3S500E device and would still be less than 12% of the slices in the smallest XC3S100E device. MAP report Number of occupied Slices: Number of Block RAMs: 113 out of 1 out of 4,656 20 75,945 2% 5% Total equivalent gate count for design: PicoBlaze makes extensive use of the distributed memory features of the Spartan-3E device leading to very high design efficiency. If this design was replicated to fill the XC3S500E device, it would represent the equivalent of over 1.5 million gates. Not bad for a device even marketing claims to be 500 thousand gates Floorplanner view FPGA Editor view XC3S500E PicoBlaze Spartan-3E Starter Kit Initial Design 4
Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD  - page 5
Design Files The source files provided for the reference design are….. Top level file and main description of hardware. Contains I/O required to disable other StrataFLASH memory device on the board which may otherwise interfere with the LCD display. I/O constraints file for Spartan-3E Starter Kit and timing specifications for 50MHz clock. s3esk_startup.vhd s3esk_startup.ucf kcpsm3.vhd control.vhd PicoBlaze processor for Spartan-3E devices. Assembled program for PicoBlaze (stored in a Block memory) control.psm PicoBlaze program source assembler code s3esk_startup_rev2.mcs PROM programming file for this design for use with any of the FLASH storage devices Note: The file shown in green is not included with the reference design as it is provided with PicoBlaze download. Please visit the PicoBlaze Web site for your free copy of PicoBlaze, assembler, JTAG_loader and documentation. www.xilinx.com/picoblaze Hint - If you only want to write new programs for PicoBlaze using the existing hardware design, then simply use the JTAG_Loader utility supplied with PicoBlaze. The design supplied is already equipped with the JTAG loading circuit (see schematic on next page). PicoBlaze Spartan-3E Starter Kit Initial Design 5
Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD  - page 6
PicoBlaze Circuit Diagram Vcc * StrataFLASH memory must be disabled to prevent interference with the LCD display. * * * lcd(7) lcd(6) lcd(5) lcd(4) kcpsm3_reset ‘JTAG_loader’ allows rapid PicoBlaze code development. program_rom control proc_reset instruction clk address address instruction JTAG led(7) led(6) led(5) led(4) output_ports led(3) led(2) led(1) 7 led(0) strataflash_oe strataflash_ce strataflash_we kcpsm3 processor address rotary_press rotary_press_in input_ports in_port instruction out_port out_port in_port write_strobe read_strobe reset port_id read_strobe port_id write_strobe bidirectional LCD data lcd(7) lcd(6) lcd(5) lcd(4) Pull-down resistors added to switch and press button inputs in UCF file. btn_west btn_north btn_south btn_east switch(3) switch(2) switch(1) switch(0) rotary_filter & direction 1 0 interrupt interrupt clk interrupt_ack clk lcd_rs interrupt_control 6 rotary_left rotary_event interrupt_ack lcd_rw lcd_e rotary_a rotary_b See reference design called ‘Rotary Encoder Interface for Spartan-3E Starter Kit’ for details of this section. 50MHz clk Synchronous design PicoBlaze Spartan-3E Starter Kit Initial Design 6
Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD  - page 7
LCD Display Connections The board is set up to use the 4-wire data interface to the LCD character module. The data connections are shared with the StrataFLASH memory which must be disabled to prevent interference. This diagram shows the pin connections to the Spartan-3E device. +5v 390Ω 390Ω 390Ω 390Ω lcd_rs lcd_rw lcd_e L18 L17 M18 LCD_RS LCD_RW LCD_E RS RW E D7 M15 P17 R16 R15 lcd(7) lcd(6) lcd(5) lcd(4) LCD Display D6 D5 D4 The LCD display is powered by a +5v supply. This means that if the display is read it will potentially drive the data signal lines above the maximum level (V CCO +0.5v) allowed for the Spartan-3E and StrataFLASH pins which are both powered by 3.3v. Therefore the display data pins have been connected via 390Ω series resistors to limit the current and voltage during read operations. Hint – This design provides all the mechanisms to enable the display to be read but does not actually need to use it. Most applications only require write operations. +3.3v strataflash_oe strataflash_we strataflash_ce C18 D17 D16 SF-OE SF-WE SF-CE0 OE# WE# CE0 D11 D10 D9 D8 SF-D11 SF-D10 SF-D9 SF-D8 IC22 StrataFLASH Holding all three controls High ensures that the StrataFLASH memory does not interfere with the LCD display and also prevents inadvertent modifications to the memory contents. GND +5v RS RW E D4 D5 D6 D7 Hint - The signals can be easily monitored at the edge of the display if desired. PicoBlaze Spartan-3E Starter Kit Initial Design 7
Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD  - page 8
LCD Display Timing Once mastered, the LCD display is a practical way to display a variety of information using standard ASCII characters and even allows you to create some of your own. However, these displays are not fast. This design scrolls the display at ½ second intervals and that really is the practical limit for clarity. This low performance rate also relates to the signals used for communication. Compared with a Spartan-3E operating at 50MHz, the display can appear extremely slow. This is where PicoBlaze can be used to efficiently implement timing delays as well as control the actual content of the display. 4-bit Write Operation This timing diagram shows a single write operation being performed. The diagram is approximately to scale showing the minimum times allowed for setup, hold and enable pulse length relative to a 50MHz clock (20ns period). The data D[7:4], Register Select (RS) and write control (RW) must be set up at least 40ns before the enable E goes High. Enable must be High for at least 230ns which is almost 12 clock cycles at 50MHz. Hint – In a write only system, the R/W signal can be tied Low permanently. 8-bit Write Operation 50MHz RS D[7:4] R/W E 230ns 40ns 0=command 1=data Valid Data After initial display communication is established, all data transfers are 8-bit ASCII character codes, data bytes or 8-bit addresses. Each 8-bit transfer obviously has to be decomposed into two 4-bit transfers which must be spaced by at least 1µs. Following an 8-bit write operation, there must be an interval of at least 40µs before the next communication. This delay must be increased to 1.64ms following a clear display command. Upper 4-bits RS D[7:4] R/W E 10ns Lower 4-bits 1µs 40µs Exercise – Implement a hardware based state machine which obeys the timing requirements for an 8-bit write of data including the 40µs delay. Modify the PicoBlaze interface and code to use your hardware circuit to write to the display. Under what circumstances would this approach be useful? PicoBlaze Spartan-3E Starter Kit Initial Design 8
Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD  - page 9
PicoBlaze Timing In this design, PicoBlaze is used to implement the LCD communication 100% in software. The fact that a processor is sequential in nature means that the required delays can be formed simply by executing the appropriate number of instructions. PicoBlaze simplifies the task of writing code because all instructions execute in two clock cycles under all conditions. CONSTANT delay_1us_constant, 0B delay_1us: LOAD s0, delay_1us_constant wait_1us: SUB s0, 01 JUMP NZ, wait_1us RETURN delay_40us: LOAD s1, 28 wait_40us: CALL delay_1us SUB s1, 01 JUMP NZ, wait_40us RETURN The PicoBlaze program supplied implements a 1µs delay in software which it then uses as the base for all operations. This subroutine is invoked with a ‘CALL delay_1us’ which then LOADs register s0 with 11 (0B hex). This in turn causes the SUB and JUMPNZ instructions to execute 11 times before RETURN completes the routine. This means that a delay of exactly 1µs is formed by the 25 instructions each taking two clock cycles at 50MHz. Creating other delays such as the 40µs required between 8-bit transfers is then a simple case of calling the ‘delay_1us’ the appropriate number of times. In this case 40 (28 hex) times results in slightly more than 40µs due to the executions of instructions within the routine itself. Exercise – Calculate the exact number of instructions, clock cycles and delay provided by the ‘delay_40us’ subroutine. Prove your result either by simulation or preferably by running a test design on the Starter Kit and making measurements. LCD_pulse_E: XOR s4, LCD_E OUTPUT s4, LCD_output_port CALL delay_1us XOR s4, LCD_E OUTPUT s4, LCD_output_port RETURN The enable E pulse is formed by setting the E signal High on the output port, waiting for 1µs and then driving E Low again. This oscilloscope screen shot shows a single enable pulse observed at the LCD display pin. Data bit D7 is also shown (see code on next page for more details). Exercise – 1µs is greater than the 230ns minimum requirement for the enable pulse width. Modify the code to generate an enable pulse which is 250ns. 1.08µs E D7 PicoBlaze Spartan-3E Starter Kit Initial Design 9
Xilinx PicoBlaze Initial Design for Spartan-3E Starter Kit (LCD  - page 10
PicoBlaze Timing LCD_write_data: LOAD s4, s5 AND s4, F0 OR s4, 0C OUTPUT s4, LCD_output_port CALL LCD_pulse_E CALL delay_1us LOAD s4, s5 SL1 s4 SL1 s4 SL0 s4 SL0 s4 OUTPUT s4, LCD_output_port CALL LCD_pulse_E CALL delay_40us LOAD s4, F0 OUTPUT s4, LCD_output_port RETURN ;Enable=0 RS=0 Instruction, RW=0 Write, E=0 ;Enable=1 RS=1 Data, RW=0 Write, E=0 ;set up RS and RW >40ns before enable pulse ;write upper nibble ;wait >1us ;select lower nibble with ;Enable=1 ;RS=1 Data ;RW=0 Write ;E=0 ;set up RS and RW >40ns before enable pulse ;write lower nibble ;wait >40us ;Enable=0 RS=0 Instruction, RW=0 Write, E=0 ;Release master enable The writing of 8-bit data is achieved using the delays and enable pulse routines together with appropriate setting the D[7:4] data bits, RW=0 and RS=1. Writing command instructions to the display is very similar but requires that RS=0. >1µs between E pulses writing upper and then lower nibbles 8-bit writes. >1µs between E pulses E 44µs D7 1µs/div PicoBlaze Spartan-3E Starter Kit Initial Design 10
You're reading the first 10 out of 13 pages of this docs, please download or login to readmore.

People are reading about...